Challenges and Progress in the Fabrication of Silicon Nanowire Tunnel Diodes

Daniel Moraru

doi:10.62146/ijecbe.v1i1.23

Authors

Daniel Moraru Shizuoka University

DOI:

https://doi.org/10.62146/ijecbe.v1i1.23

Keywords:

Silicon, Nanowire, Pn Diode, Band-to-Band Tunneling, Silicon-on-Insulator, Nanofabrication

Abstract

Tunnel (Esaki) diodes prepared in silicon (Si) nanowires could provide a unique platform to investigate band-to-band tunneling (BTBT) transport in nanoscale. However, the successful fabrication of these devices poses substantial challenges, related to controlling high doping concentrations, maintaining the abruptness of the pn junction, and minimizing roughness due to nanoscale patterning. This paper comprehensively addresses these challenges, suggesting potential strategies for optimization. Additionally, examples of nanoscale diodes fabricated so far in silicon-on-insulator (SOI) substrates are showcased, highlighting their tunnel-diode characteristics at low temperatures. Furthermore, the underlying physics is discussed: phonon-assisted tunneling, single-charge tunneling and donor-acceptor compensation. For practical applications, such as photodetectors or tunnel field-effect transistors, room-temperature operation is also required.

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